AMORGOS
A physics-inspired LDPC decoder achieving 1,000× lower bit error rate than belief propagation at low SNR.
Mixed-signal LDPC decoder. Venue: JSSC 2025 • ESSDERC 2024.
AMORGOS is a physics-inspired LDPC decoder in TSMC 28nm. LDPC codes are used in 5G, Wi-Fi, and satellite communications. Decoding—finding a valid codeword that satisfies parity constraints despite channel noise—is a combinatorial optimization problem that maps naturally to oscillator-based hardware.
Architecture
Each bit maps to a relaxation oscillator spin; each parity check becomes a clause. 96 spins connect to 48 parity-check clauses through twin crossbars, enabling six-body spin interactions. When parity checks are violated, feedback nudges spins toward a satisfying assignment. When all checks pass, the system freezes.
Soft Information
The key is soft information: rather than initializing spins with hard binary values, the chip initializes spin phases based on channel confidence, guiding the system toward the correct codeword. This allows the decoder to outperform belief propagation by orders of magnitude at low SNR.
Results
95 ns time-to-solution, 7.28 pJ/bit. 1,000× lower BER than belief propagation at 2–5 dB SNR. Testing exceeded 100 million decoding cycles with stable operation from −20°C to 70°C.